Sector4F is a self-proprietorship under which I place all of my freelance work and major personal projects. My latest major project was to develop and maintain Panandâ, an award-winning mobile app that lets users explore the historical markers and commemorative plaques installed by the National Historical Commission of the Philippines and its predecessor agencies.

Panandâ website: https://pananda.sector4f.com/
Panandâ GitHub repository: https://github.com/seav/pananda

As a full-stack web developer, I worked as part of a fully-remote development team that developed and maintained Cadasta 2.0, which was an open-source cloud-based platform written in Django/Python and running on Ubuntu that helped land agencies and NGOs collect and record documentation on land tenure and property rights.

Some of the specific tasks I did in my role include:
▪ Implementing a search interface for the platform that integrated with an Elasticsearch backend service
▪ Creating and maintaining an automated functional test suite for the frontend of the platform using Selenium with Python bindings and integrated into GitHub's Travis CI workflow
▪ Testing the platform’s internationalization and localization features both on the website and on integrated OpenDataKit-based survey questionnaires
▪ Investigating and resolving assigned bugs in the platform code, and performing code reviews on pull requests

Relevant GitHub repositories:
▪ https://github.com/Cadasta/cadasta-platform
▪ https://github.com/Cadasta/cadasta-test

As a hardware engineer, my roles were in the field of ASIC/SoC Design (VHDL) and Design Verification (e language), technology quality management, and technical training. From 2003 until 2011, I was part of a team that did design verification for ASIC/SoC designs that are used in Canon's products such as cameras and printers. From 2011 until 2014, I was part of a team that maintained QA processes and standards and reviewed compliance of other technical teams to those standards. And from 2012 to 2016, I transitioned to VHDL RTL design, helping to develop and maintain secure network protocol (IPsec, SSL/TLS) and cryptographic IP cores (AES, SHA) that are embedded in ASICs/SoCs used in Canon's products.